The present application claims priority to Japanese Application No. P10-231855 filed Aug. 18, 1998 and Japanese Application No. P10-255275 filed Sep. 9, 1998 which applications are incorporated herein by reference to the extent permitted by law.
1. Field of the Invention
The present invention relates to an electrooptic device a driving substrate for an electrooptic device, and a method of manufacturing the electrooptic device and the substrate. Particularly, the present invention relates to a structure and method suitable for a liquid crystal display device or the like which comprises an active region comprising top gate type thin film insulating gate electric field effect transistors (referred to as xe2x80x9ctop gate type MOSTETxe2x80x9d hereinafter, which includes a stagger type and a coplanar type) formed by using a single crystal silicon layer hetero-epitaxially grown on an insulation substrate, and a passive region.
2. Description of the Related Art
Known examples of active matrix type liquid crystal display devices include a device comprising a display region comprising amorphous silicon TFTs, and external driving circuit IC, a device comprising a display region comprising polycrystalline silicon TFTs, and driving circuits, which are integrated (Japanese Unexamined Patent Publication No. 6-242433), a-device comprising a display region comprising TFTs made of polycrystalline silicon formed by excimer laser annealing, and driving circuits, which are integrated (Japanese Unexamined Patent Publication No. 7-131030), and the like.
Although the above-described conventional amorphous silicon TFT has good productivity, p-channel MOSTFT (referred to as xe2x80x9cpMOSTFTxe2x80x9d hereinafter) cannot be formed because electron mobility is as low as about 0.5 to 1.0 cm2/vxc2x7sec. Therefore, the peripheral driving region using pMOSTFT and the display region cannot be formed on the same glass substrate, and thus driver IC is externally provided and is mounted by a TAB system or the like, causing difficulties in decreasing cost. This also causes a limit to an increase in definition. In addition, a sufficient on-current cannot be obtained because electron mobility is as low as about 0.5 to 1.0 cm2/vxc2x7sec, and the use of the amorphous silicon TFT for the display region inevitably increases the transistor size, causing disadvantages for increasing the aperture ratio of pixels.
The above-described conventional polycrystalline silicon TFT has an electron mobility of 70 to 100 cm2/vxc2x7sec, and can comply with the need to increase definition.
Therefore, LCD (liquid crystal display) comprising polycrystalline silicon TFTs integrated with driving circuits has recently attracted attention. However, in large LCD of 15 inches or more, the driving ability is insufficient because the electron mobility of polycrystalline silicon is 70 to 100 cm2/vxc2x7sec, thereby causing the need for an external driving circuit.
In TFT comprising polycrystalline silicon formed by a solid phase growth method, there is the need for forming gate SiO2 by annealing at 600xc2x0 C. or more for ten-odd hours, and thermal oxidation at about 1000xc2x0 C., and thus a semiconductor producing apparatus must be used. Therefore, the wafer size is limited to 8 to 12 inches Ø, and expensive quarts glass having high heat resistance must be used, causing difficulties in decreasing cost. Application of this TFT is thus limited to EVF and data/AV projectors.
The above-described conventional polycrystalline silicon TFT formed by excimer laser annealing has problems of stability of excimer laser output, productivity, an increase in equipment cost due a size increase, deterioration in yield and quality, etc.
Particularly, in a 1-m square large glass substrate, the above problems become significant, and it is more difficult to improve performance and quality, and decrease the cost.
Accordingly, it is an object of the present invention to permit uniform deposition of a single crystal silicon thin film having high electron/hole mobility at a relatively low temperature to manufacture an active matrix substrate comprising a built-in high-performance driver, and an electrooptic device such as a thin film semiconductor device for display comprising the active matrix substrate, thereby permitting a structure in which a display region comprising n-channel MOSTFTs (referred tb as xe2x80x9cnMOSTFTsxe2x80x9d hereinafter) or pMOSTFTs having a LDD structure (lightly doped drain structure) having high switching properties and a low leak current, or complementary thin film insulation gate electric field effect transistors (referred to as xe2x80x9ccMOSTFTsxe2x80x9d hereinafter) having a high driving ability is integrated with peripheral driving circuits comprising cMOSTFT, nMOSTFT, pMOSTFT, or a mixture thereof. This can realize a display panel having high image quality, high definition, a narrow frame, high efficiency and a large screen, and permits the use of a large glass substrate having a relatively low strain point, and a decrease in cost due to high productivity and no need for an expensive manufacturing apparatus, as well as permitting a high-speed operation and a large screen due to the resistance decrease caused by the ease of threshold control
The present invention provides an electrooptic device and a driving substrate therefor comprising a display region comprising pixel electrodes (for example, a plurality of pixel electrodes arranged in a matrix), and a peripheral driving circuit region arranged in the periphery of the display region, which are provided on a first substrate (i.e., a driving substrate), and a predetermined optical material such as a liquid crystal held between the first substrate and a second substrate (i.e., a counter substrate), wherein a material layer having good lattice matching with a single crystal semiconductor such as single crystal silicon or the like is formed on one side of the first substrate, a single crystal semiconductor layer such as a single crystal silicon layer is formed on the first substrate including the material layer so as to constitute at least active elements of the active and passive elements. In the present invention, of course, the single crystal semiconductor layer includes a single crystal silicon layer and a single crystal compound semiconductor layer. The active elements include a thin film transistor, and other elements such as a diode and the like, and the passive elements includes a resistor and the like. Thin film transistors as a typical example include a field effect transistor (FET) (including a MOS type and junction type, both of which can be used), and a bipolar transistor. However, the present invention can be applied to both types of transistors. The passive elements include a resistor, an inductor, capacitor, and the like. An example of the passive elements is a capacitor formed by sandwiching a highly dielectric film of silicon nitride (referred to as xe2x80x9cSiNxe2x80x9d hereinafter) or the like between single crystal silicon layers (electrodes).
The present invention also provides a method of manufacturing the electrooptic device and the driving substrate thereof, comprising the steps of forming a material layer having good lattice matching with a single crystal semiconductor such as single crystal silicon or the like on one side of the first substrate, hetero-epitaxially growing a single crystal silicon layer on the first substrate including the material layer by a catalytic CVD method or high-density plasma CVD method using the material as a seed, and forming at least the active elements of the active and the passive elements by predetermined processing of the single crystal semiconductor layer. For example, after the single crystal silicon layer is deposited, the single crystal silicon layer is subjected to predetermined processing to form channel regions, source regions and drain regions, and gate regions comprising a gate insulation film and a gate electrode are formed on the channel regions, and source and drain electrodes are further formed to form top gate type first thin film transistors (particularly, MOSTFTs) as active elements, which constitute at least a portion of the peripheral driving circuit region, or the passive elements such as a resistor, a capacitor, an inductor, etc. are formed.
In the present invention, a single crystal semiconductor thin film such as a single crystal silicon thin film is formed by hetero epitaxial growth by the catalytic CVD or high-density plasma CVD method using the material layer (e.g., a crystalline sapphire film) having good lattice matching with, particularly, single crystal silicon so that the thus-formed epitaxial growth layer is used for at least the active elements of the active elements such as top gate type MOSTFTs of peripheral driving circuits of a driving substrate such as an active matrix substrate, top gate type MOSTFTs of peripheral driving circuits of an electrooptic device such as display region-peripheral driving circuit region-integrated LCD or the like, and the passive elements such as a resistor, an inductor, a capacitor, and the like. Therefore, the following significant effects (A) to (G) can be obtained.
(A) Since the material layer (for example, a crystalline sapphire film) having good lattice matching with single crystal silicon is formed on the substrate, and used as a seed for hetero epitaxial growth to form a single crystal semiconductor layer such as a single crystal silicon thin film having a high electron mobility of 540 cm2/vxc2x7sec, an electrooptic device such as a thin film semiconductor device for display comprising a built-in high-performance driver can be manufactured.
(B) Particularly, the single crystal silicon thin film exhibits high electron and hole mobility equivalent to a single crystal silicon substrate, as compared with conventional amorphous silicon thin film and polycrystalline silicon thin film. Therefore, single crystal silicon top gate type MOSTFT permits a structure in which the display region comprising nMOS, pMOSTFT or cMOSTFT having high switching properties [preferably further having the LDD (lightly doped drain) structure which relieves an electric field to decrease a leak current], and the peripheral driving circuit region comprising cMOS, nMOS or pMOSTFT having high driving ability, or a mixture thereof are integrated, realizing a display panel having high image quality, high definition, a narrow frame, high efficiency, and a large screen. Particularly, polycrystalline silicon is difficult to form pMOSTFT having high hole mobility as TFT for LCD. However, the single crystal silicon thin film of the present invention exhibits sufficiently high mobility of holes, and thus permits the manufacture of a peripheral driving circuit driven by electrons or holes, or combination of electrons and holes. The peripheral driving circuit can be integrated with TFTs of the display region having LDD structure nMOS, pMOS or CMOS to realize a panel. In panels ranging from small to medium size panels, one of a pair of vertical driving circuits in the periphery can be omitted.
(C) Since the single crystal semiconductor layer such as a single crystal silicon layer can be formed on the material layer by a low-temperature deposition technique such as the catalytic CVD (chemical vapor growth using a catalyst: substrate temperature 200 to 800xc2x0 C., particularly 300 to 400xc2x0 C.) or the like using the material layer as a seed for hetero epitaxial growth, a single crystal silicon film can be uniformly formed on the substrate at low temperature. Therefore, it is possible to use a substrate easily obtained and having low cost and good physical properties, such as a glass substrate having a relatively low strain point, a heat-resistant organic substrate, or the like. It is also possible to increase the size of the substrate.
(D) Unlike the solid growth method, annealing at medium temperature for a long time (about 600xc2x0 C., ten-odd hours), and excimer laser annealing are unnecessary, thereby causing high productivity and no need for an expensive manufacturing apparatus. This permits cost reduction.
(E) In the hetero epitaxial growth, a wide range of P-type or N-type conduction single crystal silicon thin films with high mobility can easily be obtained by controlling the crystallinity of the material layer of crystalline sapphire or the like, the gas composition ratio of catalytic CVD, the heating temperature of the substrate, the cooling rate, etc., thereby permitting easy control of Vth (threshold value), and a high-speed operation due to a decrease in resistance.
(F) In deposition of single crystal silicon by catalytic CVD or the like, doping with an appropriate amount of III-group or V-group impurity element (boron, phosphorus, antimony, arsenic, bismuth, aluminum, or the like) can be separately carried out by using a doping gas to appropriately control the type and/or concentration of the impurity of the single crystal silicon thin film formed by hetero epitaxial growth, i.e., the conduction type such as P type or N type, and/or the carrier concentration.
(G) Since the material layer such as a crystalline sapphire thin film or the like functions as a diffusion barrier for various atoms, it is possible to suppress impurity diffusion from the glass substrate.